Daniel Tyukov

An MCP server that runs on your own machine and connects an AI assistant to Albert Heijn, the Dutch supermarket. It searches the full assortment with prices, nutrition and allergens, reads this week’s bonus, finds Allerhande recipes or imports one from another recipe site, and after one sign-in works with your shopping list, your booked order, past orders and in-store receipts.

The slow part of doing the weekly shop by hand is getting from “five high-protein lunches under 30 euros” to a correct basket, so the server does that arithmetic itself instead of leaving it to the model. plan_meal_prep reads ingredient lines in Dutch or English, scales and merges the recipes, picks a product for each ingredient, works out how many packs to buy and what is left over, and prices the result with every bonus deal applied the way Albert Heijn applies it at checkout.

It talks to the same API as the Albert Heijn app. Sign-in happens once in a window of your own browser, which catches the code the login page normally hands to the app; tokens stay in owner-only files and renew themselves. While no delivery is booked the assistant edits your list directly. Once one is, every change comes back first as a preview with each quantity before and after, the new total and the closing time, and goes through only after you approve it. Booking the slot and paying stay in the app. Released with one-line installers for macOS, Linux and Windows. Not affiliated with Albert Heijn.

An architecture explorer that starts from an AI workload and ends at checked hardware. The input is a model, such as Llama 3.2 1B decoding, a target such as five tokens per second, and limits on area, power and process node. ChipLeap works out the bandwidth, compute and memory the target needs. An agent then names the bottleneck, evaluates every single change, keeps the best one and records why, choosing the on-chip and external memory, the dataflow, the array size, the precision, the CPU, the clock and the node. Seeded global sampling around it gives a Pareto front.

The chosen design comes out as hardware: accelerator RTL in SystemVerilog with GEMV, weight-stationary and output-stationary cores, wrapped either as an X-HEEP RISC-V SoC configuration or as AXI4 IP for an Arm, RISC-V or FPGA host, with a C driver, a testbench and a datasheet. Verification simulates it against a golden model, synthesizes it and, with --steps all, places and routes it through LibreLane on the IHP SG13G2 open PDK with DRC, LVS and antenna checks. Cadence, Synopsys and Siemens simulators and synthesis tools work as well, on the same machine or on a design server over ssh, and a PDK of your own can be measured from its liberty files.

The performance model runs the same tile schedule as the RTL, so the two are checked against each other: cycle counts equal simulation when memory does not stall, and the accelerator’s logic area is fitted to Yosys synthesis on SG13G2 across 11 configurations. Figures for other nodes are scaled from published data, and the docs give the source of each. ChipLeap is also an MCP server, so Claude or Cursor can be asked for the smallest chip on the open PDK that runs a given model at a given speed. Released as 0.2.0 on PyPI.

In August 2026 Jane Street published the final GDS of a small SKY130 chip with no netlist and no signal names, and asked what it does. This solve was done in October, after the submission window had closed, with every step built as a script so the whole thing reruns in about 15 s.

The extractor merges li1 and the five metal layers into polygons, joins them across the 33,323 via cuts with a union-find, and attaches pins from the labels left inside each standard cell. It was tested on the warm-up first, where the post-route DEF still has the real names, and only then pointed at the puzzle. Cell functions come from the SKY130 Liberty file and are compiled into one Python function over integer bit-vectors, so a single pass simulates hundreds of inputs. Icarus Verilog running the official cell models agrees on 1903 cycles across 13 boards.

The useful experiment was 122 simulations at once, each placing one star at one board position. The flops that change separate eleven column counters, eleven region counters whose position sets are the region map, a 12-stage delay line for the adjacency rule and an 8-bit LFSR. z3 finds exactly one valid board, and fed to the extracted chip it raises success and prints (* TWO STARS *). Two independent routes give the same string: a SAT unroll of the raw netlist, and a brute force of the LFSR’s 256 seeds against the 15-byte message ROM (x⁸ + x⁶ + x⁵ + x⁴ + 1, recovered from traces).

The most interesting part was the seventh Easter egg. A metal-only extraction finds two inputs with no driver, which prints TWO“NOT TOUCH. The SKY130 LEF defines that a31oi_2’s A1 pin as two li1 rectangles that meet only through gate poly, and the router landed a different net on each half. Following poly joins exactly that one pair of nets, the message comes out right, and the result is graph-identical to an independent Magic extraction.

Jane Street has published two puzzles built from neural networks. In the first, a 1.16 GB PyTorch model with every weight visible returns 0 for almost any text. In the second, a trading model has been dropped into 97 linear layers, and the job is to put them back in order. Both were solved in October 2026, after the puzzles had closed, with every step written as a script that reruns in about 30 s and a test for every number in the write-up.

The first model is a pickle that rebuilds a Python function, so it is opened with an inert unpickler that never runs anything, and the function is decompiled from its CPython 3.10 bytecode. All 2721 layers have power-of-two weights and integer biases, which makes them a logic circuit: wires plus AND, NOR, NOT and a few other gates written as ReLUs. The last two layers compare 16 bytes against a constant, and probing random inputs finds all 64 MD5 steps inside, with two Kogge-Stone adders per step. Some intermediate sums never sit in a single neuron, only in linear combinations of them, which a linear probe recovers exactly. The same probes explain a known bug: the network counts characters instead of finding the end of the string, so anything over 31 characters overflows its length field. A word-frequency search over pairs of English words finds the preimage, bitter lesson, in a few seconds.

For the second puzzle, the trace of W_out W_in pairs every input layer with its output layer, and the norm of the output layers rises with depth. Sorting by it and swapping neighbours rebuilds a network that matches the original predictions to 1.6 × 10⁻⁶, and the answer’s SHA-256 equals the hash in Jane Street’s checker. A slower search that assumes nothing reaches the same answer in about 13 minutes, and PyTorch running the original class definitions agrees with both reimplementations.

An MCP server that runs on a student’s own machine and connects an AI assistant to four TU Delft systems: Brightspace for courses, materials, assignments, grades and discussions, OSIRIS for official results and registrations, MyTimetable for the schedule, and the public Study Guide. You can ask what is due this week, what changed since yesterday, or where a topic is covered in the lecture slides.

Sign-in happens once, in a window of your own browser, and OSIRIS and MyTimetable connect in the same window after single sign-on. When a token later expires, the server reopens that browser profile headless and lets single sign-on finish without a window; only a fresh password or MFA prompt needs you again. Tokens are kept in owner-only files (DPAPI on Windows), never returned to the model, and stripped from every link a tool returns. Every write, from submitting an assignment to registering for an exam, is split into a prepare step that returns a preview and a confirm step that acts on it. Course materials can be synced into a local full-text index, with text pulled from PDF and Office files and ranked by BM25 with fuzzy matching.

Published on npm with one-line installers for macOS, Linux and Windows. ChatGPT, which cannot launch a local process, connects over HTTP through a tunnel with a bearer token. Not affiliated with TU Delft.

Anti Brainrot puts the things that eat a day behind friction rather than a wall. In Chrome it hides YouTube Shorts, can replace the home feed with Subscriptions, and pauses the feeds of TikTok, Instagram, X, Reddit and the rest behind a countdown, a one-line intention and a timed pass drawn from a daily budget. On Android the same rules cover whole apps. One switch, the filter, sits over everything: restrictions can be tightened at any time, but loosened only after a countdown whose length was chosen when the filter went on.

The extension is Manifest V3 with no build step. Site blocking, forced safe search and YouTube Restricted Mode are declarativeNetRequest rule sets, in-page navigation is caught by content scripts, and an optional educational mode only plays videos from allowed categories or channels. Locked hours turn the filter on by schedule, and the browser’s own extensions page is blocked while it is on, so it cannot simply be removed. The Android app, in Kotlin and Jetpack Compose, blocks apps through an accessibility service, filters sites at the DNS level through a local VPN service, and can register as a device admin to refuse uninstalling.

Version 1.8.4, with the extension as a zip and the app as an APK on the releases page. It makes no network calls of its own and has no accounts or analytics. The Chrome Web Store listing is not live yet.

Plug a laptop into a monitor and the computer guesses which side the monitor is on. When the guess is wrong, the pointer has to leave through the edge facing away from the monitor. Screen Side Switcher fixes that with one click, a tray menu, a keyboard shortcut or a command (screen-side left), and remembers the arrangement at each desk so it comes back by itself when those screens are plugged in again. It handles several external screens, alignment by top, centre or bottom, and which screen is primary.

The app, Screen Side, is a Rust core with a Tauri window and a command line tool on top. The core asks one of six backends for the screens, works out the arrangement in force, changes the intent rather than the coordinates, and recomputes every position from there; an arrangement whose screens would overlap is refused instead of being nudged into a gap the pointer cannot cross. Each backend sizes screens exactly as its compositor does, because a rounding difference leaves adjacent screens a pixel apart and the pointer stops at the seam. Saved layouts store the intent against each monitor’s identity, not coordinates, so they survive a change of resolution or scale, and two identical monitors without serial numbers are told apart by connector order.

Version 2.0 is a rewrite of a GNOME-only Python tool from August, and now covers Windows, macOS, GNOME, KDE Plasma, wlroots desktops such as Sway and Hyprland, and other X11 desktops. The README is plain about testing: reading and checking are verified on GNOME 46, reading on Windows and macOS runs in CI, and the other Linux backends are written against their tools’ documented output, with reports welcome.

ToHoot is a task list that tracks time against the day you actually had. One list runs on a Linux or Windows desktop and an Android phone, sits beside your real calendar, and can be read and edited by Claude. There is no server of its own: sync, calendar and the Claude endpoint run in accounts you already have, on free tiers that fail rather than bill.

One React app runs unchanged in a Tauri window, a Capacitor WebView and a plain browser under test, with each shell supplying a single platform adapter. The datastore is an append-only event log in a private GitHub repository. Every device writes only under its own prefix, so merging is replay rather than reconciliation, and events are put in a total order by timestamp, device id and ULID, so every device computes the same state. Time is stored as increments, which makes two devices timing the same task add up instead of overwriting each other, and a rejected ref update is the only concurrency check: nothing is ever force-pushed. An MCP server exposes fifteen tools over the same log, locally or as a Cloudflare Worker the app deploys into your own account.

Fifteen releases shipped in four weeks, built by GitHub Actions for Linux, Windows and Android, with an architecture document written so anyone storing their data in it can audit the format.

Garmin and Hevy have no official integration. The common case it fixes: you start a strength activity on the watch for heart rate and training load, but log the actual sets in Hevy on your phone, and end up with half the session in each app. garmin-hevy-sync runs five flows every 30 minutes in the background: Hevy workouts merged into the matching watch activity, Hevy routines pushed to Garmin as planned workouts, watch-only sessions copied back to Hevy, Garmin weigh-ins copied to Hevy’s body measurements, and a repair pass for exercise names.

That repair pass is the interesting part. Sets merged into Garmin Connect all showed as “Choose an Exercise” even though the API returned a correct name for each one. The cause was the confidence field Garmin’s own rep detection writes: merged sets carried 0.0, which Garmin Connect reads as “nothing identified”. Rewriting only that field, and only on sets that already carry a name, makes the names, the volume column and the muscle map appear. Going the other way, Garmin’s exercise constants are matched to Hevy’s titles by scoring normalised token sets, with missing equipment words weighted as nearly free, a cached map and manual overrides.

Version 0.2 made it something anyone can run. A one-line installer for macOS, Linux or Windows brings its own Python, and an interactive setup checks the Hevy key, signs in to Garmin once (the password is used for that sign-in and never stored) and schedules itself with the system’s own scheduler: a systemd timer, a launchd agent or a windowless Task Scheduler task, or a loop inside a Docker container. A failed background run raises a notification, the ledger is written before the next request so a crash cannot duplicate a workout, and CI installs the tool and registers a real schedule on all three operating systems. hevy2garmin 0.12 now writes full confidence itself; the repair pass stays for activities merged before that.

Developed against a Venu 4. It needs Hevy Pro for the API and builds on the hevy2garmin project for the first two flows.

A personal rebuild of the NASA-IMPACT marine debris detector, which ran TensorFlow 1.14 on commercial Planet imagery and no longer installs. This version reads free Sentinel-2 imagery over HTTP and runs from one pip install, without a GPU or API keys. Detection needs no training and runs as a cascade: spectral indices (FDI, FAI, NDVI, NDWI, PI, kNDVI, MNDWI) screen the scene in microseconds per tile, so OWLv2 detection (about 18 seconds per tile on CPU) and SAM 2 segmentation run only where something looks interesting. On a coastal scene off Accra that skipped 44% of detector calls, cutting 11.1 minutes to 6.2.

The vision model does not carry the signal at 10 m. The same OWLv2 weights score 0.794 on a COCO photograph and 0.210 on a Sentinel-2 chip, because a 30 m debris patch spans three pixels. So I also trained a gradient-boosting classifier over 11 bands and 7 indices on MARIDA, the public Sentinel-2 benchmark, using its scene-grouped split so no test scene leaks into training: 429,412 training pixels, 76 seconds to fit on CPU. Debris reaches a best F1 of 0.656, or precision 0.944 at recall 0.375, and the patch-bootstrap interval on that F1 runs from 0.27 to 0.78 because MARIDA has only 381 debris test pixels. On three open-ocean test scenes it reached precision 1.00 at about 0.71 recall with zero false positives.

The same run is a much better sargassum detector: F1 0.948 with no retraining, and its sargassum probabilities are calibrated (expected calibration error 0.003). Sargassum floats in mats tens of metres across and fills whole pixels; debris is thin filaments. A band ablation shows the same split: on the four PlanetScope bands NASA-IMPACT used, debris F1 drops to 0.080 while sargassum keeps 0.928.

I then ran it over all 64 Sentinel-2 passes of Bonaire’s January to August 2025 season. The windward coast was usable on 64 to 73% of passes, and Lac Bay went up to 20 days between usable looks, which is the number a monitoring plan has to be built around. The run also exposed two defects in the pipeline itself, including a water mask, there to keep bright sand out, that removed the sargassum as well. 894 tests run in CI.

Two open-source IP cores, each checked against an independent software model and then taken through LibreLane to a routed, signed-off layout on IHP’s open SG13G2 130 nm process. Every number below is post-route unless it says otherwise. Neither core has been fabricated.

The VGA controller drives four VESA modes (640x480, 800x600 and 1024x768 at 60 Hz, 720x400 at 70 Hz) from a timing table, with per-character colour from a 16-entry palette, a hardware cursor, blink, reverse video, underline and runtime-selectable 8x8 and 8x16 glyphs. Routed, the die is 476,640 µm² at 60.3% utilisation, 2.72x the synthesis estimate, and draws 10.5 mW at 65 MHz. DRC and LVS are clean with no setup or hold violations at any of the three corners.

Synthesis had flagged a load-limited path in the pixel domain. Place and route spent 73,282 µm² on timing-repair buffers, 27% of the routed cell area, and the 1024x768 slack at the slow corner grew from +4.965 ns to +7.585 ns. The slow-corner gate-level netlist renders 307,200 pixels identical to the Python reference renderer, and the eight sync-generator assertions are proved unbounded by an inductive invariant.

The CORDIC accelerator is an OBI peripheral for the Croc RISC-V SoC that computes eleven functions without a multiplier, which the build asserts by checking that the synthesized design holds no multiply, divide or MAC operator before cell mapping. One stage module feeds a pipelined core (one result per cycle, 1.954 mm²) and a folded core (one result per 29 cycles, 0.383 mm²), bit-identical over 900 operations. Synthesis ranked the pipelined core faster by 27%. Routed, the folded core is faster by 16% (90.9 against 78.6 MHz at 1.08 V and 125 °C), because the larger die spends 2.69 of its 12.72 ns critical path in buffers. The folded die is DRC and LVS clean; the pipelined one passes LVS with one Metal2 minimum-area violation left.

Two designs taken from RTL to a signed-off layout on IHP’s open SG13G2 130 nm process with LibreLane 3.0.0.dev44, the version the Tiny Tapeout IHP shuttle pins. Both are DRC and LVS clean, pass Tiny Tapeout’s precheck, and pass their cocotb suites a second time on the hardened gate-level netlist. Neither has been fabricated, which would go through a Tiny Tapeout shuttle; both can be opened in the 3D GDS viewer.

The 1x1 tile drives a TinyVGA PMOD with eight 640x480 pattern generators. Six are pure functions of pixel position and frame count, because 142 flip-flops leave no room for a framebuffer. A TRNG picks the pattern: two ring oscillators into von Neumann debiasing, an LFSR conditioner and SP 800-90B style health tests on the raw samples. The build counts all 12 ring stages after synthesis and again after routing, since a ring the optimiser collapsed would still give a clean GDS. Synthesis put the cells at 57.6% of the tile; routed they fill 82.7% of its 31,318 µm², with hold buffers alone taking 23% of the cell area. Setup closes with +17.45 ns of slack at the slow corner, 44.91 MHz against the 25.175 MHz the pixel clock needs.

The NPU is a 4x2 weight-stationary systolic array of signed INT8 MACs with 24-bit saturating accumulators and integer-only per-channel requantization, driven over a framed byte protocol. Five adder architectures (ripple-carry, Brent-Kung, Kogge-Stone, Sklansky, Han-Carlson) and three multipliers are parameterized generators, and 35 SymbiYosys proofs show each one is exact over its whole input space at the widths the core uses. A 16-12-10 network run on the RTL scores 0.883 on scikit-learn digits in INT8 and float32 alike: quantization moves the outputs by up to 1.81 LSB and flips no prediction. The 4x2, 6x2 and 8x2 tiles were all hardened to signoff, and 6x2 ships with the best setup slack, +12.54 ns at 40 MHz.

An open-source test chip design that asks two questions by measurement: which INT8 multiplier is best in silicon, and does sign-magnitude operand encoding save power? Five candidates (inferred *, Wallace tree, Booth radix-4, sign-magnitude and bit-serial) sit behind one identical interface and run the same 32x32x32 GEMM in 4x4x4 tiles of 64 MACs. Each was placed and routed on its own on IHP SG13G2 at the same 20 ns period and 40% target utilisation, and all five signed off with zero DRC and LVS errors. Power is measured on each routed netlist with extracted parasitics, only after that netlist has been checked bit-exact against a NumPy reference.

Post-route, Fmax at the slow corner (1.08 V, 125 °C), power and energy at the typical corner with a 20 ns clock and half the operands negative:

Candidate	Routed cell area	Die	Fmax	Power	Energy/tile	Cycles
Booth radix-4	383,415 µm²	0.796 mm²	83.0 MHz	8.21 mW	419 pJ	3,904
Sign-magnitude	394,146 µm²	0.819 mm²	69.2 MHz	8.41 mW	429 pJ	3,904
Inferred	443,933 µm²	0.939 mm²	81.4 MHz	8.73 mW	446 pJ	3,904
Wallace tree	476,959 µm²	0.994 mm²	77.9 MHz	9.35 mW	477 pJ	3,904
Bit-serial	185,463 µm²	0.356 mm²	77.3 MHz	6.51 mW	1,245 pJ	7,488

Among the single-cycle designs Booth radix-4 wins outright: 20% smaller, 12% cheaper in energy and 6.5% faster than the hand-written Wallace tree, which in turn loses to the inferred baseline on area, speed and energy. Bit-serial draws the least power but needs nearly twice the cycles, so it spends 2.6 times the energy of the Wallace tree.

Sign-magnitude is a qualified result. Against the identical two’s complement datapath it routes 17.4% smaller and 10.1% cheaper in energy, but closes 11.2% slower, and Booth still beats it on all three. At synthesis it costs 4.2% more power on an all-positive operand stream, the common post-ReLU case, and a transition-count proxy would have overstated its saving by about a factor of two. Nothing has been fabricated: every number is a routed block, and the wrapper that holds all five engines still fails DRC signoff.

Meeting Copilot runs in the terminal during live conversations about code, built for the moment when you know the answer but the words will not come fast enough: a stammer or another speech difference, brain fog, nerves, or a second language. Launched inside a project, it transcribes the room, and on one keypress drafts what to say next in the first person, grounded in that repository: an answer if a question was just put to you, a few talking points otherwise. A Chrome side-panel build does the same on Google Meet and Teams calls.

Audio comes in through ffmpeg, and transcription and drafting run off the capture loop, so the interface never blocks. Transcription streams to Deepgram and falls back to local Whisper when the key is missing or the connection drops. Answers go to the Claude API, then the claude CLI, then a local Qwen model through Ollama, and the header shows which backend is live as it switches mid-session. Offline, voices are told apart by a NumPy MFCC and pitch fingerprint clustered into two speakers, gated on silhouette score so a weak split falls back to one, and they are named from their own introductions or a calendar invite’s attendees.

Version 0.4.2 runs 294 Python tests in CI and ships a changelog and a privacy note listing everything that leaves the machine. Cloud transcription sends audio to Deepgram; --stt local keeps everything on the device. The extension is loaded unpacked rather than from the Chrome Web Store. Once installed it appears as Sparky, the interface it shares with Portable Copilot.

Portable Copilot puts open-weight language models on a USB stick. Plug it into a Windows, macOS or Linux computer, run one file, and you can chat, write, code, ask about your own documents or read images, with nothing installed on the computer and no internet: the model runs on the machine in front of you. Setup asks what the stick is for and how much memory its computers have, then picks models that fit from a catalog of 39, adding a small quick one beside any large one so there is always something fast to switch to.

One launcher, sparky.cmd, is both a shell script and a Windows batch file. It points the home folder, caches and settings at the stick, starts a portable Python for whichever OS it finds, and runs a bundled Ollama on its own port against one set of weights shared by every OS. Setup downloads pinned releases and checks them against their published checksums. The Windows Ollama build is 1.5 GB, nearly all of it GPU libraries a portable CPU build never uses, so setup reads the zip’s index over HTTP range requests and fetches only the 24 MB it needs. The context window is set on every request, because Ollama’s CPU default of 4096 tokens cuts long conversations off without saying so, and when a computer lacks the memory for the chosen model the reply comes from the next smaller one instead of failing. The browser front end listens on 127.0.0.1 only and needs a token printed in the terminal at launch.

Version 0.4.0. It began in June 2026 as a coding agent that fell back from the Claude API to a local model, went fully local in 0.3, and in 0.4 opened up to any open-weight model, chosen by purpose. The bundled Ollama runs with its cloud features off, so nothing leaves the computer except model downloads you ask for. Once installed it appears as Sparky, the interface it shares with Meeting Copilot. Models small enough to carry make more mistakes than large cloud models and are slower on most laptops, which the README says plainly.

With TU Delft ECTM and ITEC B.V. / Nexperia, I designed the PCB test vehicle for a micro-LED die-bonding study, extending the v1 board published at ECTC 2025. It is a 93 × 93 mm two-layer FR-4 board with ENIG on every pad, carrying a 6 × 6 bond-pad design of experiments at 3.5 mm pitch, TLM ladders, van der Pauw cloverleaves, 26 Würth RGB LED sites, four NTCs and an LCR calibration set, laid out in KiCad 9 from Python generators. The LED pads ship as bare gold, because the joint is the thing under test. Five of the fabricated boards carried the eight samples.

In the cleanroom, Sn42Bi57.6Ag0.4 paste was printed by hand through a 100 µm stencil, dies were placed on a Tresky T-3000-PRO and the joints formed on a hot plate. Read against the capillary self-alignment literature, the observed alignment and tilt point to solder volume as the dominant variable, and manual printing does not meter it.

The electrical work covered eight blind-coded conditions: 40 dice bonded, 36 measurable, 120 channels. A DMM screen called six channels bad, and an Arduino rig sweeping 63 current levels per channel agreed on all six. Yield and failure mode separate the conditions at χ² p = 2.2 × 10⁻⁴, with conditions 5 and 7 at 100 percent and condition 3 at 25. Series resistance does not: re-seating the same jumpers scatters R_s by 0.84 Ω, 85 percent of the apparent die-to-die spread, while the bonds in question are 10 to 100 mΩ, so the limit is reported instead of a ranking. The ideality-factor check caught a 2.9 kΩ shunt that the DMM had passed at 1.781 V.

The board was designed for more than was measured: the TLM, van der Pauw and impedance structures went unmeasured for lack of instruments, and the daisy chains read open on every coupon because the dice sit rotated 90° from the footprint, a layout fault found by lighting each die.

In a group of three, we followed NMOS and PMOS transistors through the BICMOS5 process at the Else Kooi Laboratory (EKL): theory, simulation, the last process steps in the cleanroom, and measurement. The course wafer carries five masks plus an unmasked boron threshold-adjust implant whose dose changes by quarter, from 0 to 9 × 10¹¹ cm⁻², so one wafer shows the dose dependence directly.

Sentaurus process simulations of P, As, B and Sb put the junctions at 0.537 µm (SN), 0.594 µm (SP) and 2.085 µm (n-well), far deeper for SN and SP than the hand estimates, which ignore the later thermal steps. In a 2.5 day session in the class-100 cleanroom we mapped sheet resistance on the implanted monitor wafers, measured oxide etch rates by ellipsometry (thermal 1.71 nm/s, PECVD 5.53 nm/s in buffered HF), and patterned the aluminium interconnect of a BICMOS5 wafer both wet and dry. Under the microscope the wet etch undercuts the lines while the dry etch keeps them straight but eats into the field oxide.

On a Cascade probe station with a Keysight B1500A, re-analyzed in one MATLAB script, the Van der Pauw structures gave 1740 Ω/sq for the n-well down to 0.16 Ω/sq for the aluminium, and doping that only agrees with the simulated junction depths. The NMOS threshold climbs from −0.03 V to +0.82 V with implant dose while the PMOS moves from −3.70 V to −3.30 V, the trend Sentaurus predicts, though the simulated values sit offset from the measured ones. Long-channel mobility comes out at 750 cm²/V·s for electrons and 230 for holes, and the 1 µm devices show threshold roll-off and, in the PMOS, punch-through.

The device is the actuator of an integrated optical phase modulator. A voltage on a comb drive pulls a suspended silicon shuttle, which moves a bar sitting 200 nm from an optical waveguide and shifts the phase of the light inside it. Starting from the course geometry, I modeled it three ways, each checking the last: a lumped spring-mass-damper derived by hand (40.3 N/m, 537 kHz, Q of 81, 145 µs settling, 347 V pull-in), a 2D COMSOL model coupling solid mechanics, electrostatics and a moving mesh, and a 3D model. Every COMSOL model is built and solved from Python through MPh.

The finite-element models found what the hand model could not. Damped settling agreed to 0.7% (158 against 159 µs), but pull-in arrives at 224 V as a rotational rocking mode, not the axial collapse the lumped model predicts, confirmed on a 51,000-element mesh. In 3D, the 200 nm device’s real fundamental is an out-of-plane flap at 20.0 kHz, 26 times below the working mode. Thickening to the beam width does not fix it, because the lowest out-of-plane mode is a see-saw pitch; a 10 µm device layer does, with 18% margin.

For the redesign I reduced sensitivity to a closed form, which showed the old design’s peak sat at 1377 V, far past pull-in, and that stiffening it could never help. A constrained grid search over about 10⁶ candidates picked a softer suspension and short comb fingers with a large tip clearance: an analytical peak of 73.9 mrad/V at 627 V, against 8.7 mrad/V before. COMSOL confirmed the frequency, settling and a pull-in raised to about 876 V, and also found 45% less stroke than the lumped model from shallow comb engagement and beam stiffening, putting the simulated sensitivity at 54.9 mrad/V at 760 V and still rising.

A full-custom 5-bit time-to-digital converter, designed with Joris Hoogeweegen, that digitises the time between two rising edges with a 15 ps LSB. In TSMC 180 nm BCD a conventionally sized FO4 stage bottoms out at 97 ps, so reaching the 20 ps specification needed a technique that resolves below one gate delay. Every gate was sized by hand in Cadence Virtuoso, with no standard cells, and verified in Spectre at schematic level. There is no layout.

The converter is a two-dimensional Vernier. A START line of 90 ps stages and a STOP line of 75 ps stages feed a 10 × 6 array of NAND SR-latch arbiters, so 16 logical stages cover 31 codes, and a bijective map sends exactly one latch to each thermometer bit with no combining logic. The other 29 cells hold dummy latches so every tap drives the same load. A 1-D row built from the same cells shows why that matters: with unequal loading its LSB came out at 28.6 ps instead of the predicted 16.6 ps.

With one fixed trim setting all five process corners pass, with LSB between 13.1 and 18.2 ps, DNL at most 0.90 LSB and no missing codes. Switchable MOSCAP banks on each delay stage then pull every corner to between 15.0 and 15.85 ps, tightening the spread from 5.1 ps to 0.85 ps without changing a device. The core uses 1120 active transistors and 11.7 pJ per conversion at TT, and the arbiter’s metastable dead zone is below 1 fs.

In a team of four, we accelerated and hardened AES-128 on a CV32E40P (RI5CY) RISC-V soft core on a Zynq-7020 PYNQ board, working on the RTL, the LLVM compiler and side-channel security. Profiling put 83.8% of all cycles in mix_columns. We added the RISC-V scalar-crypto instructions aes32esmi and aes32esi to the core’s ALU and decoder, which took the workload from 61,184 to 6,260 cycles. A custom LLVM pass that fully unrolls the 9-round loop brought it to 4,800, and a teammate’s two-lane masked S-box instruction to 4,104. These counts come from the core’s cycle counter in Vivado XSim, and every build is checked against the AES-128 known-answer ciphertext.

My own track was side-channel resistance. I designed a 2-share Domain-Oriented-Masking S-box in the tower field GF((2⁴)²), with registered DOM-AND gates and 20 bits of fresh randomness per evaluation, and built a simulation-based CPA and TVLA rig to attack it. The unprotected hardware S-box gave up its key byte in about 100 traces, with a TVLA t-statistic of 44. The masked one left the true key at rank 35 of 256 after 20,000 traces, with t = 1.4 against a threshold of 4.5, for 182 LUTs and 100 flip-flops.

Both my unmasked and masked S-boxes were built into bitstreams and run on the board. AES-128 finished in 4,369 and 5,506 cycles respectively, with the correct ciphertext and every instruction output matching a software reference. A teammate’s power capture on a CW305 board agreed with the simulation: with masking, the hardware TVLA peak fell to 3.98, below threshold.

Accelerated the de Gruijl inferior-olive simulator, a sequential Python model of electrically coupled brain cells, on CPU and GPU. I wrote one vectorised simulation step with three backends: NumPy, Numba (@njit) and JAX (jit with lax.scan), the last running unchanged on an NVIDIA T4.

Profiling put the dendrite update, which holds the all-to-all gap-junction loop, at 49% of runtime. That sum collapses exactly to C_gap·(N·V_d − ΣV_d), so one global sum per step serves every cell and the coupling drops from O(N²) to O(N). Numba then runs 199x faster than the original at 30 cells and 316x at 100 cells, at 9.04 µs per step, the only backend inside the 10 µs real-time budget. The T4 stays near 46 µs per step from 2 to 10,000 cells because kernel launches, not arithmetic, set its cost, and at 100,000 cells it is 99x faster than Numba.

At N = 1 the vectorised step reproduces the reference trace to 1.1 × 10⁻¹³ mV. For larger networks the gap junction moves from a Gauss-Seidel sweep to a Jacobi update, which stays within 0.02 mV (correlation 1.0000 at 30 cells). The speed also exposed a limit the original code was too slow to reach: at the fixed coupling, forward Euler is only stable for N < 2/(δ·C_gap) = 4000, and the trajectory diverges at 4,000 cells.

An agent for the LTspice schematics in a folder. Asked for a change in plain language, it reads the circuit as parts with the net on every pin, edits it with typed operations, simulates it and checks the result against a spec table before it answers. It places parts and routes wires itself, so an edited schematic still reads cleanly when opened in LTspice, and every edit is saved as a snapshot that can be undone. Simulation runs on ngspice, on LTspice (natively, or under Wine on Linux), on Xyce, or on Cadence Spectre on a licensed server over SSH, and the model can be Claude, GPT, Gemini, anything on OpenRouter or Ollama, or any OpenAI-compatible endpoint.

Beyond a single run it sweeps parameters, runs Monte Carlo tolerance analysis with a yield, sizes parts within bounds to meet several specs at once, finds poles and zeros, and reports the bias point of every transistor with its region, gm and gm/Id. A SPICE netlist, or a circuit read from a picture, can be laid out as a readable schematic, and the drawing is refused unless it netlists back to the same circuit. One engine sits behind a desktop app, a command line tool and an MCP server, so Claude Code or Cursor get the same tools as the app’s own chat, and aispice check fails a CI build when a circuit stops meeting its specs.

The first version, from March 2026, was a Tauri chat window beside LTspice that edited .asc files and made LTspice reload them. Version 0.2.0 is a rewrite as one Rust workspace: a lossless reader and writer for LTspice’s files in every encoding it uses, a netlister that follows LTspice’s own, the simulator backends and measurements, and the agent with its tool registry. Circuit files, simulator logs and model output are treated as data: tools stay inside the project folder, every netlist is checked against an allowlist before a simulator sees it, and keys live in the OS keychain. A 13-task design suite, judged by simulation, measures how well a model uses the tools; fixing what it found took Gemini 3.1 Flash-Lite from 10 tasks passed to 12.

Hardware FFT accelerators for a PicoRV32 RISC-V system-on-chip, taken through the full ASIC flow on the gpdk045 45 nm kit in a team of ten: RTL, constraints, Genus synthesis, Innovus place-and-route, post-layout simulation with SDF back-annotation and VCD-annotated power analysis. The team delivered two designs against the same SoC, an unmodifiable testbench and a fixed 596.4 µm × 596.4 µm core.

The high-performance design replaces per-butterfly memory traffic with a register file and a four-phase pipelined butterfly. A 32-point FFT drops from 732 to 121 cycles and the clock rises from 12 to 66.2 MHz, so latency falls from 61.00 to 1.83 µs. The energy-efficient design keeps the 12 MHz clock and does less work: 32 real samples are packed into a 16-point complex FFT computed as two Radix-4 stages (the first needs no multipliers), with hardcoded twiddles, Hermitian recombination and manual clock gating. Energy per FFT falls from 24.6 to 2.59 nJ at 0.239 mW.

Both designs close setup and hold with zero violations post-route and pass DRC and antenna checks. Neither is fully DRV clean: max-transition violations remain on 10 nets in the high-performance design and 316 in the energy-efficient one, which the course brief accepts. My part was the low-activity twiddle handling, register implementation and manual clock gating on the energy-efficient design, the baseline full-flow bring-up, and reviews of every teammate’s branch.

An MCP server that runs on your machine and gives Claude Code, Claude Desktop, Cursor, VS Code, Codex or any other MCP client the IEEE literature: search with boolean, author, venue, affiliation and year filters or by meaning, full metadata, the citation graph in both directions, full text, and references in BibTeX, RIS, CSL-JSON or five formatted styles.

The first version wrapped the IEEE Xplore API and needed a key, which IEEE is slow to issue and deactivates after inactivity. Version 2 is a rewrite that works with no configuration: it searches OpenAlex restricted to IEEE as a publisher, uses the IEEE API only while a key is healthy, and when IEEE rejects the key or the quota runs out it switches over for the rest of the session and says so in the response. Open-access PDFs are checked against the paper’s title, because OpenAlex sometimes attaches the wrong one. Paywalled papers go through your institution’s proxy after one browser sign-in with MFA, and the session renews itself from the saved profile. Library licences forbid systematic downloading, so proxy downloads are spaced at least 10 seconds apart, capped per day and cached, and there is no bulk tool.

Released as 2.0.1 with CI on three operating systems, CodeQL, and design, client and security docs. Metadata comes only from documented public APIs; it never scrapes Xplore pages.

Designed a discrete-time, fully differential folded-cascode amplifier with ideal gain boosting on a 180 nm CMOS process, sized for the lowest power that meets spec. It sits in a switched-capacitor stage with a closed-loop gain of 8 (18 pF input, 2.25 pF feedback, 18 pF load) and must settle a 1.2 V differential output step to 63 dB accuracy within 2.8 µs from a 1.8 V supply.

The 80.64 dB SNR target caps integrated output noise at 78.8 µVrms, so noise, not speed, set the design. I gave the input pair a multiplier of 200, deep in weak inversion, for the most transconductance per microamp, used 18 pF of input capacitance to hold down kT/C noise, and swept bias current and capacitance for the minimum-power point. One LTspice testbench carries the bias generator, ideal common-mode feedback, the gain-boosting sources and a loaded replica, so the AC, transient and noise runs share one operating point.

The final circuit draws 62.2 µA, or 0.112 mW, and reaches 63.32 dB at 2.8 µs. Integrated noise is 76.93 µVrms for an SNR of 80.85 dB, and the figure of merit is 175.2 dB against a 174.0 dB target. The open-loop and closed-loop AC runs agree on a 329 kHz closed-loop bandwidth, and the time constant measured in the transient (497 ns) lands within 3 percent of the AC prediction (483 ns).

OwlTransfer keeps one ordinary folder the same on a Linux or Windows desktop and an Android phone, over the Wi-Fi they already share. Drop a file in on one side and the other pulls it straight away. Both devices hold a full copy, so either works offline and they catch up the next time they see each other. It is deliberately not a backup or a cloud drive: nothing exists anywhere except on the devices you paired.

The engine is a Rust crate with no UI in it, tested on its own. Each device keeps an index with a BLAKE3 hash and a version vector per path, announces changes over one TLS connection and pulls missing bytes in 256 KiB blocks, so a rename moves no data and an edit made on both sides keeps both copies. A device’s id is the SHA-256 of a certificate it generated itself, and rustls runs with no system trust store. Pairing is a commit-reveal exchange: one side commits to a random nonce before seeing the other’s, and both then derive the same six digits from an HMAC over both nonces and both certificates, so neither side can steer the code. Discovery is a UDP broadcast treated as a hint, since acting on it means a handshake that fails unless the certificate is already trusted.

Version 0.1.4 ships an AppImage, a deb, Windows installers and a signed APK. It started as a Flutter prototype and was rewritten around the Rust engine. On Android, sync runs only while the app is open; there is no foreground service yet.

Designed the first amplifier of a hearing-loop receiver on a 180 nm CMOS process: the block that turns a pick-up coil’s signal into a clean audio voltage for the ADC that follows. The coil output is proportional to the rate of change of magnetic flux, so the amplifier is an integrator, H(s) = 62.4 × 10³/s, which keeps the 600 Hz to 6 kHz band flat while driving a 10 pF converter input on a 1 mW power budget.

I followed the structured design order: specification, transfer, noise, stages, poles and zeros, then compensation, with SLiCAP for the symbolic analysis and every result checked numerically in ngspice. A 79.97 kΩ termination critically damps the coil’s 150 kHz resonance. The source, termination and feedback resistors get 40 percent of the 10.6 µV weighted noise budget and the input device the rest, which fixes its transconductance. One common-source stage could not keep its loop gain above 0 dB across the band, so the final circuit is a PMOS differential input pair for noise followed by an NMOS common-source stage for loop gain. Output noise comes to 7.48 µVrms before DIN-A weighting, already inside the weighted budget.

On the EKV transistor model all five closed-loop poles sit in the left half-plane, but one pair near 51 MHz has a Q of 5.4 and peaks. A 420 Ω phantom-zero resistor in series with the load, with the feedback tapped before it, pulls that pair to a Q of 0.70 for a maximally flat response, with no compensation capacitor and no added noise in the signal path.

Cheatsheet Maker is an editor for one kind of document: the single sheet you are allowed to take into an exam. Everything on the page is a box that can be moved, resized, rotated and cropped. Paste a screenshot, drag a box around part of a lecture PDF, type notes in a small Markdown subset with LaTeX typeset by MathJax, draw and highlight over it, then let auto-pack fit it all onto the page and export a PDF. A print check lists images that will print below 150 DPI and text smaller than 5 pt before the sheet goes to the printer.

The document model is plain TypeScript with no DOM. Edits are pure functions that return a new document and reuse every object that did not change, so undo keeps whole snapshots cheaply: images are referenced by id, never embedded. Auto-pack is a MaxRects packer. Its “fill the page” mode binary-searches the largest single scale at which everything still fits on one page, starting from the bound that no scale can exceed the square root of the page area over the total area of the boxes, and tries two placement heuristics at each step. One renderer draws the editor, the page thumbnails and both exports, so what is on screen is what prints, and in the PDF the strokes and shapes stay vector with each item placed by the same transformation matrix as on the canvas. Images are stored in IndexedDB under the SHA-256 of their bytes, so a lecture page cut into five crops is kept once, and a crop can be widened again later.

It started in November 2025 as a GTK3 app in C for Linux, about 1,800 lines, kept at the v0-gtk tag. Version 1.0, in October 2026, is the rewrite: the same build runs as a web app that works offline after one visit and installs from the browser, and inside Tauri on Windows, macOS, Linux and Android. The Rust shell is deliberately thin: the native save dialog and file writes (webviews do not download), and one command that reads the old app’s autosave, which the Linux build offers to import on first launch. One detail from the Android build: Android 15 draws apps edge to edge but the WebView reports no safe-area insets, so the activity pads it by the system bars itself.

There is no account and no server. Sheets stay in a library on the device and can be saved as a .cheatsheet file, a zip of the document and its images, to move them elsewhere. The README is plain that the Windows installer is not code-signed and the macOS build is not notarised, and says what to click the first time.

In the Dutch rental market the first reply to a listing often wins it. nl-property-finder is one background process on your own computer that checks every enabled source every one to three minutes, reads the alert emails the platforms send to a mailbox kept for the search, contacts the landlord as soon as a home matches, books viewings inside the times you are free, and puts only offers, contracts, payment requests and anything uncertain in one inbox, with buttons on your phone.

The same home on Funda, Pararius and the agent’s own site is clustered into one property, by postcode and house number or a fingerprint of street, price band and size band, and contacted once. Hard filters run first, so an AI call is only spent on a property that already passes; Claude then extracts the landlord’s requirements and classifies replies, and without a key rules and templates take over. Every match gets an estimate of the legal maximum rent from the official points system, flags for unlawful deposits and fees, and a scam check. State is one SQLite database with a keyed job queue, so a restart never repeats a message, and a send interrupted halfway becomes a task rather than a retry.

It runs as a login service on Linux, macOS and Windows, with a demo mode against a fake rental market and a CLI, REST API and MCP server beside the dashboard. It never pays, signs, shares a BSN or gets past a captcha, and on platforms whose terms forbid automation it only contacts landlords once you switch that on for that platform.

A five-person project in the second year of the TU/e Honors Academy (High Tech Systems track). The long-term idea, which I proposed, is a rescue scout that can cross ground, air and water on its own; the goal for the year was one robot that both drives and flies. The design follows Caltech’s M4 and the FSTAR2 sprawl robot: four legs, each ending in a 3D-printed wheel with an 8 inch propeller inside it. A DC motor on the leg drives the wheel through teeth on its rim. For flight a servo turns the whole leg 90°, so the propeller faces up and the rim is held still, and a printed stop keeps the servo from being pushed past 90° under thrust.

The robot runs ROS 2 Jazzy on a Raspberry Pi 5. A keyboard node publishes joystick messages, a movement manager sends them to driving or flight depending on the current mode, and pressing Q starts a morph action that steps the leg servos so the body lowers smoothly. An Arduino Due running micro-ROS drives the four DC motors and hosts the servo service. Flight runs on a Pixhawk 6C with ArduPilot, still on its own radio controller.

My part was the wheel and the flight hardware. I designed the wheel, including a bearing of sixteen 17 mm steel rods in a printed cage, because a commercial bearing of that size (about 58 mm across) would have added several hundred grams. I chose and wired the flight stack: EMAX 2812 motors, 35 A ESCs, the Pixhawk and a 6S 4000 mAh pack. I soldered the power distribution board and its XT60 and telemetry looms, and checked the 5 V and 12 V rails under a 10 A load. While the parts were on order I ran ROS 2 on a small Crazyflie drone to show a take-off and landing from one command.

On the bench each motor gave 8.7 N of static thrust at 16 A, about 1.2 times what the 3 kg robot needs to hover. The prototype drove and changed modes from the keyboard, but drone regulations and the end of the year meant it was never flown free, so how well it flies is still an open question.

I developed a gold-bump flip-chip process for RF dies that needs no solder, no under-bump metallurgy and no multilayer carrier, in the Integrated Circuits group at TU/e. The interposer is a single 50 nm Ti / 100 nm Au layer on glass, patterned by lift-off into ground-signal-ground coplanar lines drawn in KLayout to a 50 Ω closed-form design. Gold stud bumps are coined from 25 µm wire on a TPT HB16 bonder and land 65 to 75 µm wide. The die is thermo-compression bonded on a Dr. Tresky T-5300 at 20 g per bump, because 35 g made dies slip. Bumping and bonding both run outside the cleanroom.

The assemblies were measured from 10 MHz to 10 GHz on a probe station with a Keysight PNA-X and GSG probes, and open and short structures de-embedded the line from the bumps. The bump reduces to a lumped model: 3.4 Ω in series at 10 MHz, with 178 pH and 249 fF taking over at higher frequency. The resistance is far above the closed-form estimate for the bump geometry, which points at the Au-Au interface and at contamination from how the interposers were stored rather than at the geometry.

Yield was measured on a separate structure, a small interposer flip-chipped onto a larger one so that 22 usable lines each close through two bumps. Three opens, two shorts and one deformed bump give 84% per-bump yield. Written up as a first-author paper at IEEE SIITME 2025.

A three-person project in the first year of the TU/e Honors Academy (High Tech Systems track), on the lab cars of the SymAware project. The question was how an autonomous car could warn the driver of an ordinary car about a hazard that driver cannot see yet. Rather than tracking obstacles one by one, the car builds a continuous risk field around itself, high wherever it is dangerous to go. We split the problem into assessing the risk, sending it to the second car and showing it to that driver, and built the first part.

The car carries a Hokuyo UST-10LX LIDAR and an NVIDIA Jetson running ROS, and streams its scans over Wi-Fi to a PC. A median filter smooths the ranges, and returns below a calibrated intensity threshold are dropped, because shiny surfaces gave false distances. Runs of neighbouring returns between 15 cm and 1.6 m become obstacles, each with a position and a width estimated from the angle it spans. The field follows the threat model of Cowlagi, Debski and Wyglinski (IEEE VTC 2021): each obstacle adds a lognormal threat whose reach depends on both vehicles’ speeds and a three-second separation rule, summed over a 300 by 300 grid centred on the car.

My part was the LIDAR and ROS side, and the speed. I wrote the ROS nodes that read and process the scans. The first version of the field took 2 seconds per frame, far too slow to follow a moving scene, and pooling and multiprocessing had not helped, so I compiled the grid calculation with Numba and ran it in parallel. A frame then took 0.03 seconds, and the field updated live on the laptop as obstacles moved in front of the car. Passing the field on to a second car was left for later; in the second year the three of us joined a larger team to build the Multi-Terrain Mobility System instead.

A nine-person team project with one brief: power a desktop PC wirelessly from a sustainable source across 10 to 20 cm, at 100 W or more. The chain is a generator and rectifier, a DC/DC boost converter, a full-bridge inverter, two series-resonant coils, a second rectifier and the load, with an STM32 setting the PWM duty cycle and switching frequency. The inverter drives the transmit coil at 80 kHz. The coils are 20 turns of Litz wire, 17 to 20 cm in radius, tuned with 16.3 nF; their measured inductance came in at 304 µH against 306 µH designed.

My part was the boost converter board, which lifts the generator’s rectified DC (up to 30 V, limited to 10 A) to 50 V for the rest of the chain. I captured it in KiCad and laid it out around an IRF640N MOSFET with an EL7104 gate driver, an MBR10100+ Schottky diode, an external inductor on screw terminals and a 220 µF output capacitor, with an LA 55-P Hall-effect current sensor and resistive dividers bringing current and voltage to the microcontroller. Power traces were sized for about 9 A at a 40 °C rise, over a ground pour covering almost the whole bottom layer.

I then assembled and tested it, starting at low voltage and checking the gate drive and output on a scope, with a breadboard copy of the circuit to isolate faults. That caught a diode footprint that did not match the part, input capacitors too far from the input terminal, wrong divider values, and a status LED and series resistor that loaded the divider. After the fixes the board ran up to 150 W with no hot spots.

The integrated system delivered 180.80 W across 10 cm at 77.36% peak efficiency, past the 100 W target. At 20 cm, with the resonance left tuned for 10 cm, it delivered 23.27 W. MPPT and load detection were written but never tested on the hardware.

An individual analog design project: a sine oscillator at 10 kHz with an amplitude adjustable from 0 to 5 Vpp and as little distortion as I could get. I compared RC phase-shift, LC and Wien-bridge oscillators and chose the Wien bridge for its clean output and simple frequency setting. Matched 10 nF capacitors and trimmer-tuned resistors set the frequency. One uA741 provides the loop gain, with a 1N4148 diode pair limiting the amplitude so the loop settles just above the oscillation condition instead of clipping, and a second uA741 stage sets the output level. A first-order RC low-pass (1.33 kΩ, 10 nF) at the output suppresses harmonics.

The Qucs simulation showed no significant harmonics. The breadboard did, so I measured the circuit with and without the filter on an NI ELVIS board with a LabVIEW instrument. At 5 Vpp the filter took THD from 2.69% to 0.96% and SINAD from 31.37 dB to 40.33 dB, with the second harmonic 51.65 dB below the fundamental. Across 0.5, 1, 2 and 5 Vpp the THD stayed between 0.42% and 1.13%, and the frequency within 1% of 10 kHz.

What limits it is component tolerance in the frequency network. An output buffer, so a load cannot upset the filter, and a second filter stage are the next steps.

LeenLoket (“lending desk” in Dutch) is a self-service tool library. Instead of buying a drill you use twice a year, you book one from your phone for a date range, walk to the locker it lives in, and open that locker with a PIN or a QR code. Two repositories: the Flutter app and the ESP32 locker firmware. There is no backend of our own. The app and the firmware are both Firebase Realtime Database clients, and that database is the entire integration surface between them. Nine top-level nodes hold users, items, reservations, codes, credit and locations. Either half can be replaced without the other knowing.

The app does email and password auth over Rive-animated onboarding, a date-range picker that filters the catalogue to items free for that window, a two-step booking flow priced at pricePerDay times days and paid from a prepaid balance, reservations each carrying a 4-digit PIN and a QR code, and a Google Map of locker locations. Admins land on a separate home screen with CRUD for items, categories, lockers and locations, plus credit top-ups.

The locker is an ESP32 driving a 4x4 keypad, an I2C QR reader, a PN532 NFC reader, an ST7920 LCD and eight WS2812B LEDs, plus a solenoid lock wired fail-secure so a power cut leaves the cabinet shut. The rule that makes it work: there is no “I am returning this” button. The firmware tells a pickup from a return by reading two fields, the reservation status and the item status, so the same four digits work twice. The first use flips the reservation to Completed, which is what makes the second read act as a return. A late pickup is the only path that does not open the door. A late return still opens, because refusing to accept an item back helps nobody.

Both READMEs list what the deadline left broken, including a return loop that spins forever waiting for the NFC tag. LeenLoket was also my startup, and a top 10 qualifier at the TU/e Contest 2025.

Pulse gives turn-by-turn directions as vibration on the handlebar instead of on a screen, so a cyclist keeps their eyes on the road. A five-person team built it, spanning electrical and mechanical engineering, computer science, mathematics and industrial design. I was the team’s electrical engineer and team lead: I chose the microcontroller, worked out power and charging, built the breadboard prototype and soldered the final unit.

On the phone, an Android notification listener reads the Google Maps navigation notification, takes the distance to the next turn, and classifies the maneuver by matching the icon bitmap against 34 reference icons. It packs the result into a short code such as r:120, turn right in 120 meters, and writes it to a BLE characteristic on the handlebar unit.

The unit is an Arduino Nano ESP32 running a NimBLE GATT server, with a vibration motor under each grip, a status LED and an 800 mAh LiPo charged over USB-C, in a 3D-printed case that clamps around the stem. The code picks which side buzzes and the pattern; the distance picks the length, 2 seconds beyond 100 m, 1 second inside 100 m and half a second inside 50 m. The parts came to €49.20 against a €70 target.

Studocu, and Studeersnel in the Netherlands, blur most pages of a document for readers without a subscription and cover the rest in upgrade banners. StudocuHack is a Manifest V3 extension for Chrome, Brave, Edge and Firefox that removes the blur from every page whose content the site sends to the browser, strips the banners, badges and the modal over the document, hides the ads and the AI toolbar, and adds a Download button that captures every page and prints the whole document to PDF.

Studocu’s viewer is pdf2htmlEX output inside a React virtual scroller: each page is a figure image plus a positioned HTML text layer, fetched from a CDN with signed parameters embedded in the page’s Next.js data. The extension reads those parameters, fetches the full-resolution assets for the pages the server will serve, and keeps the blur off as React re-renders by patching the props in each page’s fiber. The limit was measured rather than guessed: on a premium document the text of a locked page is never sent to the browser, so no extension can recover it. A page missing from the signed list keeps its blurred preview and is labelled premium-locked, in the viewer and in the PDF, instead of printing as a blank sheet. One bug worth recording: figure images on the CDN are numbered in hex and text fragments in decimal, and until 2.11.0 the extension built both in hex, so text for page 10 onwards quietly failed.

Version 2.12.1 ships a zip for Chromium browsers and a Mozilla-signed xpi for Firefox. It started in July 2023 and was restructured in September 2026 into separate content scripts with a jsdom test suite and a release workflow that builds and signs on every tag; support for the Indonesian site came in as a pull request. It has no account, no server and no data collection, and its only host permission is Studocu’s asset CDN. Not affiliated with Studocu.

A ten-person team project. On a walled arena the rover had to find rock samples, avoid mountains and craters, and bring the samples back to a laboratory, all on one Arduino Uno with no remote control. A PING ultrasonic sensor on a servo sweeps 105 degrees ahead and stops the rover about 16 cm from an obstacle. Five downward infrared sensors, each two emitters and a phototransistor, read the black tape at borders and craters and the white rock samples, and a servo gripper closes on a sample.

My part, with one teammate, was finding the laboratory. The lab carries three infrared LEDs in series on a 60 cm tower, driven at 38 kHz so the receiver can tell them from sunlight. The rover carries a matched receiver on its own mast, rotates until it sees the beacon, and drives toward it.

In final testing the rover collected samples and found its way to the lab’s surroundings, but it did not complete a delivery. The report puts that down to sensor thresholds that needed more tuning and a return route that needed more accurate movement than the rover managed. The team also prototyped a Raspberry Pi camera that thresholded lightness to find borders and samples and read ArUco markers on the lab walls, kept as an extra because it fell outside the assignment rules.

The course supplies a baby simulator in a rocking cradle that signals stress through crying and a heartbeat LED, together with the model behind it and a score monitor. Teams design the sensing, the motor driver and the decision algorithm. Our sub-modules were each developed as their own M5Stack (ESP32) sketch and then combined into one controller, which won the Fastest Algorithm category in 01:42.

A microphone counts signal peaks per second on a rising-edge interrupt and compares consecutive one-second windows; a drop of 150 peaks or more counts as quieter. A light-dependent resistor watches the heartbeat LED and turns the interval between changes into beats per minute, with rest at about 60. The motor driver sets rocking frequency and amplitude on two PWM channels, five levels each from 5 to 80% duty cycle.

The algorithm starts at the most vigorous corner, 80% and 80%, and lowers the frequency one step at a time. After each step it waits and checks: on the heart rate until it falls to 130 to 150 BPM, then on the crying. If a step did not help, it undoes it and lowers the amplitude instead. Once either setting reaches its lowest level it walks the other one down until the baby rests. Two years later I coached two teams through the same challenge.

A self-hosted server for audio rooms: someone opens a room on a topic, talks through what they are building, and others drop in to listen or ask to speak. It starts with one docker compose up, with MongoDB beside it. Sign-in is an eight-digit code sent by email, and without a mail server the code is printed in the server log, so a fresh install needs no account anywhere.

Rooms are open to everyone, open to the host’s followers, or private and joined by link. Listeners come in muted and raise a hand; the host invites them to speak, moves speakers back to the audience, changes the topic and ends the room. By default voices travel directly between browsers over WebRTC in a full mesh, so the server never handles audio, which suits a couple of dozen people. Pointed at a LiveKit server, each speaker publishes once to the SFU instead and a room holds hundreds. With Redis, several server processes share presence and pass events between them, and when a process dies the others sweep its participants out of their rooms.

The first DevsBooth was a 2022 JavaScript prototype that never ran end to end. Version 1.0.0 is a rewrite in TypeScript that shares no code with it: an npm workspace of an Express and Socket.IO server, a React client and the types both sides use. It ships as a Docker image for amd64 and arm64 on GHCR, with CodeQL, a self-hosting guide covering the reverse proxy, TURN and backups, and issues labelled for first-time contributors.